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 A/D, D/C Converters for Image Signal Processing
MN6577F, MN6577H
Low Power 10-Bit 3-Volt CMOS A/D Converters for Image Processing
Overview
The MN6577F and MN6577H are high-speed 10-bit CMOS analog-to-digital converters for image processing applications. They use a half flash structure based on chopper comparators to achieve both high speed and low power consumption, and operate on a single 3 volt power supply.
Pin Assignment
MN6577F MN6577H TQFP048-P-0707 QFH048-P-0707
N.C. VRBS VRB VR3 VR2 VR1 VRT VRTS N.C. AVSS AVDD AVDD
N.C. AVDD VIN N.C. N.C. N.C. AVSS DVSS DVDD LINDF OVF N.C. 37 38 39 40 41 42 43 44 45 46 47 48
Features
Maximum conversion rate: 15 MSPS (min.) Linearity error: 1.3 LSB (typ.) Differential linearity error: 0.5 LSB (typ.) Power supply voltage: 3.0 V Power consumption: 40 mW (typ.) (fCLK=15 MHz)
36 35 34 33 32 31 30 29 28 27 26 25
24 23 22 21 20 19 18 17 16 15 14 13
Applications
Digital television Digital video equipment Digital image processing equipment
D0 D1 D2 D3 D4 DVSS DVDDL D5 D6 D7 D8 D9
1 2 3 4 5 6 7 8 9 10 11 12
POWD NOE CLK MINV LINV N.C. DVDD DVSS DVSS DVDD TEST1 TEST2
(TOP VIEW)
1
2
45
UNDF
46
Block Diagram
OVF
SS
47
D0(LSB)
1
D1
2
DVDD 44 DV SS 43 AV 39 V IN 38 AV 35 34 33
MN6577F, MN6577H
D2
3
31
31
Upper comparator (5 bits)
Encoder (5 bits)
DD
VRBS VRB
D3 4 5 D4 6 DVSS 7 DV
DDL
D5
8
D6
9
D7
D8
10 11
VR3 32 V R2 31 VR1 30 VRT 29 V 27
RTS
Clock generator
5 5 Error correction and data latch
Lower comparator (5 bits)
12 D9 13 TEST2 14 TEST1 15 DVDD 16 DVSS 17 DVSS 18 DVDD 22 CLK NOE 23 24 POWD
A/D, D/C Converters for Image Signal Processing
Pins 19, 28, 36, 37, 40, 41, 42, and 48 are no connention pins.
Lower encoder (5 bits)
29 57
AVSS 26 AV DD 25 AV
DD
21 20
MINV
(
LINV
)
A/D, D/C Converters for Image Signal Processing
Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol D0 D1 D2 D3 D4 DVSS DVDD D5 D6 D7 D8 D9 TEST2 TEST1 DVDD DVSS DVSS DVDD N.C. LINV MINV CLK NOE POWD AVDD AVDD AVSS N.C. VRTS VRT VR1 VR2 VR3 VRB VRBS N.C. N.C. AVDD VIN N.C. Function Description Digital code output (LSB) Digital code output Digital code output Digital code output Digital code output Ground for digital circuits Power supply for digital circuits Digital code output Digital code output Digital code output Digital code output Digital code output (MSB) Test mode selection pin Test mode selection pin Power supply for digital circuits Ground for digital circuits Ground for digital circuits Power supply for digital circuits No connection Output inversion pin Output inversion pin Sampling clock Digital output enable pin Power down mode selection pin Power supply for analog circuits Power supply for analog circuits Ground for analog circuits No connection Reference voltage power supply (TOP) Reference voltage input (TOP) Intermediate reference voltage Intermediate reference voltage Intermediate reference voltage Reference voltage input (BOTTOM) Reference voltage power supply (BOTTOM) No connection No connection Power supply for analog circuits Analog signal input No connection
MN6577F, MN6577H
3
MN6577F, MN6577H
Pin Description (continued)
Pin No. 41 42 43 44 45 46 47 48 Symbol N.C. N.C. AVSS DVSS DVDD UNDF OVF N.C.
A/D, D/C Converters for Image Signal Processing
Function Description No connection No connection Ground for analog circuits Ground for digital circuits Power supply for digital circuits Underflow output Overflow output No connection
Ta=25C
Absolute Maximum Ratings
Parameter Power supply voltage Input voltage Output voltage Operating ambient temperature Storage temperature Parameter Power supply voltage Digital input voltage Reference voltage Clock "H" level "L" level "H" level "L" level
"H" level pulse width "L" level pulse width
Symbol VDD VI VO Topr Tstg Symbol VDD VIH VIL VRT VRB tWH tWL VAIN min 2.85 2.4 VSS 2.0 VSS 30 30 VSS
Rating - 0.3 to +7.0 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 -20 to +70 -55 to +125 typ 3.00 max 3.30 VDD 0.8 VDD 1.0
Unit V V V C C Unit V V V V V ns ns VDD V max 72 Unit mW bit 2.5 1.0 LSB LSB MSPS 15 VRT - VRB -1.5 MHz V mA mA 20 18 7 40 ns pF ns
Recommended Operating Conditions
VDD=AVDD=DVDD=3.0V, VSS=AVSS=DVSS=0V, Ta=25C
Analog input voltage
Electrical Characteristics
Parameter Power consumption Resolution Linearity error Differential linearity error Maximum conversion rate Clock frequency Analog input dynamic range Output current "H" level "L" level
VDD=AVDD=DVDD=3.0V, AVSS=DVSS=0V, Ta=25C
Symbol Conditions PC FC=15MSPS (not including reference current) RES EL ED FC(max.) fCLK DR IOH IOL td CI tsd VOH=VDD - 0.8V VOL=0.4V CL=20pF fCLK=15MSPS VRT=3.0V VBB=1.0V
min
typ 39 10 1.3 0.5
15 1 2 1.5 10
Output delay time Analog input capacitance Sampling delay
4
A/D, D/C Converters for Image Signal Processing
Timing Chart
MN6577F, MN6577H
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital output 2.5 clock cycles later at the rising edge of the clock signal.
tWH Clock
tWL
Analog input
N tsd(7ns)
N+1 N-2 td(20ns)
N+2 N-1
N+3 N
N+4 N+1
Data output
N-3
Note: The circles indicate analog signal sampling points.
5
MN6577F, MN6577H
Package Dimensions (Unit:mm)
MN6577F TQFP048-P-0707
A/D, D/C Converters for Image Signal Processing
9.000.20 7.000.10 36 25
37
24 (0.75) 7.000.10
48
13
(1.00)
(0.75)
0.50
1.20max.
1
12 +0.10 0.20 -0.05
9.000.20 (1.00)
0.125 -0.05
+0.10
0.10
SEATING PLANE
0.100.10
0.500.10
6
0 to 10
A/D, D/C Converters for Image Signal Processing
Package Dimensions (Unit:mm)(continued)
MN6577H QFH048-P-0707
MN6577F, MN6577H
9.00.2 7.00.2 36 25
(0.75) 7.00.2
37
24
48
13
1 (0.75) 0.5
12 0.20.1 (1.0) 2.9 max. 2.50.2
+0.10 -0.05
9.00.2
0.15
0.10.1
0.1 SEATING PLANE
0.50.2
0 to 10
7


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